This invention relates to semiconductor devices, and more particularly to driver circuits of the type used in CMOS VLSI semiconductor memory devices or the like.
Semiconductor memory devices of the dynamic read/write type are constructed in N-channel technology as shown in U.S. Pat. No. 4,239,993, issued to McAlexander, White and Rao, assigned to Texas Instruments. As set forth in such Patent, some of the clocks and control signals are preferably boosted to voltage levels above the supply. For example, the row lines are boosted so that a full one level can be written into the storage capacitors. Thus, the row decoder which activates the row lines must produce an output exceeding the power supply voltage. This is accomplished in NMOS circuitry by bootstrapping, but is not as easily achieved in CMOS technology.
Accordingly, one of the problems encountered in CMOS memory designs is that of getting the gate of N-channel transfer and load devices above the supply voltage Vcc in order to eliminate threshold losses on the signal level. Due to forward biasing the drain junction of the P-channel load device, the output of an inverter cannot be booted above Vcc as with NMOS drivers. One solution to this problem in CMOS is to provide a Vcc+ voltage, i.e., a voltage supply higher than the Vcc level supplied to the chip. Generated on chip from the Vcc supply, this voltage is sufficiently greater than Vcc that any NMOS device will be driven into the triode region, eliminating the Vt loss problem. The difficulty of this approach is generating sufficient current to handle the current requirements of any CMOS inverters connected to this Vcc+ supply. If the load to be driven has large capacitance and must be driven with fast transitions, this requires wide load transistors in the driver to meet the transition requirement. The Vcc+ thus has not only the capacitor charging current requirement but it must also be able to meet the large switching current in the inverter driver stage, when both the N and P channel devices are on.
It is therefore the principal object of this invention to provide improved driver circuits for semiconductor dynamic memory devices or the like, particularly using CMOS circuitry. Another object is to provide an improved driver circuit which produces an output exceeding the power supply voltage, but does not exhibit a high current drain upon an on-chip high voltage supply circuit.